The present invention relates generally to a semiconductor package, and more particularly to a semiconductor package having multiple types of through-electrodes capable of improving characteristics for transmitting signals and power.
Recent design trends in the semiconductor industry include manufacturing products in such a way as to accomplish weight reduction, device miniaturization, high speed operation, multi-functionality, high performance, high reliability, and low manufacturing cost. Semiconductor package forming technology is considered as one important technology for achieving the above design trends in the semiconductor industry.
Recently, various techniques for a stack package (i.e., two or more semiconductor chips or semiconductor packages being vertically stacked) have been developed in attempts to further miniaturization, high capacity, and high mounting efficiency. The stack package is advantageous in that, products having memory capacity greater than that obtained by a general semiconductor integration process may be realized when utilizing the stack package, and additionally, when implementing the stack package a mounting area utilization efficiency can be increased. The stack package can be manufactured by a first method, in which individual semiconductor chips are stacked and then the stacked semiconductor chips are packaged together, or a second method, in which individual packaged semiconductor chips are stacked and packaged together.
In semiconductor packages including the stack package, electrical connections are produced by metal wires, bumps, or through-electrodes, and the electrical connections are formed between a semiconductor chip, or a semiconductor package, and a substrate, between semiconductor chips, or between semiconductor packages.
Recently, of the above-mentioned various electrical connection forming elements, studies have been conducted with regards to the stack packages manufactured using semiconductor packages which are formed with through-electrodes because electrical degradation can be minimized, operation speed can be increased, and miniaturization can be accomplished when electrical connections are formed through the through-electrodes.
Typically, through-electrodes of a semiconductor package are formed by filling a metallic material into through-holes defined in semiconductor chips. The through-electrodes perform a function of transmitting both signals and power between elements of stacked semiconductor packages.
Typically, insulation layers are formed between the through-holes and the through-electrodes thus preventing the leakage of current to other portions of the semiconductor chips. The insulation layers can adversely influence the high speed operation of the through-electrodes because the insulation layers serve as capacitors due to their arrangement between the portions of the semiconductor chips and the through-electrodes.
FIG. 1 is a graph showing the relationship between signal loss and frequency in the conventional stack package formed using semiconductor packages having through-electrodes.
Referring to FIG. 1, it is to be understood that signal loss through the through-electrodes rapidly increases up to the frequency of 1 GHz due to the presence of the insulation layers serving as capacitors. This is because capacitance increases by the presence of the insulation layers.
Accordingly, when realizing a stack package using through-electrodes, in order to improve the electrical characteristics of the stack package, it is necessary to adjust the capacitance of through-electrodes for signal transmission and the capacitance of through-electrodes for power transmission.